PCB DESIGN
Schematics & board layout
Aeronix-sponsored senior design: schematic and multilayer layout work for an SPI IMU, USB debug interface with ESD protection, and a 44-pin expansion header.
PCB DESIGN / FPGA DEVELOPMENT
I’m an electrical engineer focused on PCB design and FPGA/RTL development. Explore my board design work and digital logic labs below.
PCB DESIGN
Aeronix-sponsored senior design: schematic and multilayer layout work for an SPI IMU, USB debug interface with ESD protection, and a 44-pin expansion header.
FPGA / RTL
Logic and ROM designs, a comparator testbench covering all 16 input combinations, and a multiplexer taken from pin constraints through bitstream programming and board checks.
At Santee Cooper, I’ve ported C code to Linux, deployed changes with Git across eight servers, and supported a new energy management system rollout.
Experience & educationC, Linux & Git workSupporting projectsTraining & credentials