Verilog and FPGA labs
Logic and ROM designs, a comparator testbench covering all 16 input combinations, and a multiplexer implemented and checked on a PYNQ-Z2.
Digital logic, simulation testbenches, and FPGA implementation in Vivado.
Logic and ROM designs, a comparator testbench covering all 16 input combinations, and a multiplexer implemented and checked on a PYNQ-Z2.
I use the PYNQ-Z2 with Parallel Programming Labs and the Nexys A7-100T with The FPGA Programming Handbook. I’m also studying SystemVerilog verification.
